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/usr/include/misc/xilinx_sdfec.h


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     1	/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
     2	/*
     3	 * Xilinx SD-FEC
     4	 *
     5	 * Copyright (C) 2019 Xilinx, Inc.
     6	 *
     7	 * Description:
     8	 * This driver is developed for SDFEC16 IP. It provides a char device
     9	 * in sysfs and supports file operations like open(), close() and ioctl().
    10	 */
    11	#ifndef __XILINX_SDFEC_H__
    12	#define __XILINX_SDFEC_H__
    13	
    14	#include <linux/types.h>
    15	
    16	/* Shared LDPC Tables */
    17	#define XSDFEC_LDPC_SC_TABLE_ADDR_BASE (0x10000)
    18	#define XSDFEC_LDPC_SC_TABLE_ADDR_HIGH (0x10400)
    19	#define XSDFEC_LDPC_LA_TABLE_ADDR_BASE (0x18000)
    20	#define XSDFEC_LDPC_LA_TABLE_ADDR_HIGH (0x19000)
    21	#define XSDFEC_LDPC_QC_TABLE_ADDR_BASE (0x20000)
    22	#define XSDFEC_LDPC_QC_TABLE_ADDR_HIGH (0x28000)
    23	
    24	/* LDPC tables depth */
    25	#define XSDFEC_SC_TABLE_DEPTH                                                  \
    26		(XSDFEC_LDPC_SC_TABLE_ADDR_HIGH - XSDFEC_LDPC_SC_TABLE_ADDR_BASE)
    27	#define XSDFEC_LA_TABLE_DEPTH                                                  \
    28		(XSDFEC_LDPC_LA_TABLE_ADDR_HIGH - XSDFEC_LDPC_LA_TABLE_ADDR_BASE)
    29	#define XSDFEC_QC_TABLE_DEPTH                                                  \
    30		(XSDFEC_LDPC_QC_TABLE_ADDR_HIGH - XSDFEC_LDPC_QC_TABLE_ADDR_BASE)
    31	
    32	/**
    33	 * enum xsdfec_code - Code Type.
    34	 * @XSDFEC_TURBO_CODE: Driver is configured for Turbo mode.
    35	 * @XSDFEC_LDPC_CODE: Driver is configured for LDPC mode.
    36	 *
    37	 * This enum is used to indicate the mode of the driver. The mode is determined
    38	 * by checking which codes are set in the driver. Note that the mode cannot be
    39	 * changed by the driver.
    40	 */
    41	enum xsdfec_code {
    42		XSDFEC_TURBO_CODE = 0,
    43		XSDFEC_LDPC_CODE,
    44	};
    45	
    46	/**
    47	 * enum xsdfec_order - Order
    48	 * @XSDFEC_MAINTAIN_ORDER: Maintain order execution of blocks.
    49	 * @XSDFEC_OUT_OF_ORDER: Out-of-order execution of blocks.
    50	 *
    51	 * This enum is used to indicate whether the order of blocks can change from
    52	 * input to output.
    53	 */
    54	enum xsdfec_order {
    55		XSDFEC_MAINTAIN_ORDER = 0,
    56		XSDFEC_OUT_OF_ORDER,
    57	};
    58	
    59	/**
    60	 * enum xsdfec_turbo_alg - Turbo Algorithm Type.
    61	 * @XSDFEC_MAX_SCALE: Max Log-Map algorithm with extrinsic scaling. When
    62	 *		      scaling is set to this is equivalent to the Max Log-Map
    63	 *		      algorithm.
    64	 * @XSDFEC_MAX_STAR: Log-Map algorithm.
    65	 * @XSDFEC_TURBO_ALG_MAX: Used to indicate out of bound Turbo algorithms.
    66	 *
    67	 * This enum specifies which Turbo Decode algorithm is in use.
    68	 */
    69	enum xsdfec_turbo_alg {
    70		XSDFEC_MAX_SCALE = 0,
    71		XSDFEC_MAX_STAR,
    72		XSDFEC_TURBO_ALG_MAX,
    73	};
    74	
    75	/**
    76	 * enum xsdfec_state - State.
    77	 * @XSDFEC_INIT: Driver is initialized.
    78	 * @XSDFEC_STARTED: Driver is started.
    79	 * @XSDFEC_STOPPED: Driver is stopped.
    80	 * @XSDFEC_NEEDS_RESET: Driver needs to be reset.
    81	 * @XSDFEC_PL_RECONFIGURE: Programmable Logic needs to be recofigured.
    82	 *
    83	 * This enum is used to indicate the state of the driver.
    84	 */
    85	enum xsdfec_state {
    86		XSDFEC_INIT = 0,
    87		XSDFEC_STARTED,
    88		XSDFEC_STOPPED,
    89		XSDFEC_NEEDS_RESET,
    90		XSDFEC_PL_RECONFIGURE,
    91	};
    92	
    93	/**
    94	 * enum xsdfec_axis_width - AXIS_WIDTH.DIN Setting for 128-bit width.
    95	 * @XSDFEC_1x128b: DIN data input stream consists of a 128-bit lane
    96	 * @XSDFEC_2x128b: DIN data input stream consists of two 128-bit lanes
    97	 * @XSDFEC_4x128b: DIN data input stream consists of four 128-bit lanes
    98	 *
    99	 * This enum is used to indicate the AXIS_WIDTH.DIN setting for 128-bit width.
   100	 * The number of lanes of the DIN data input stream depends upon the
   101	 * AXIS_WIDTH.DIN parameter.
   102	 */
   103	enum xsdfec_axis_width {
   104		XSDFEC_1x128b = 1,
   105		XSDFEC_2x128b = 2,
   106		XSDFEC_4x128b = 4,
   107	};
   108	
   109	/**
   110	 * enum xsdfec_axis_word_include - Words Configuration.
   111	 * @XSDFEC_FIXED_VALUE: Fixed, the DIN_WORDS AXI4-Stream interface is removed
   112	 *			from the IP instance and is driven with the specified
   113	 *			number of words.
   114	 * @XSDFEC_IN_BLOCK: In Block, configures the IP instance to expect a single
   115	 *		     DIN_WORDS value per input code block. The DIN_WORDS
   116	 *		     interface is present.
   117	 * @XSDFEC_PER_AXI_TRANSACTION: Per Transaction, configures the IP instance to
   118	 * expect one DIN_WORDS value per input transaction on the DIN interface. The
   119	 * DIN_WORDS interface is present.
   120	 * @XSDFEC_AXIS_WORDS_INCLUDE_MAX: Used to indicate out of bound Words
   121	 *				   Configurations.
   122	 *
   123	 * This enum is used to specify the DIN_WORDS configuration.
   124	 */
   125	enum xsdfec_axis_word_include {
   126		XSDFEC_FIXED_VALUE = 0,
   127		XSDFEC_IN_BLOCK,
   128		XSDFEC_PER_AXI_TRANSACTION,
   129		XSDFEC_AXIS_WORDS_INCLUDE_MAX,
   130	};
   131	
   132	/**
   133	 * struct xsdfec_turbo - User data for Turbo codes.
   134	 * @alg: Specifies which Turbo decode algorithm to use
   135	 * @scale: Specifies the extrinsic scaling to apply when the Max Scale algorithm
   136	 *	   has been selected
   137	 *
   138	 * Turbo code structure to communicate parameters to XSDFEC driver.
   139	 */
   140	struct xsdfec_turbo {
   141		__u32 alg;
   142		__u8 scale;
   143	};
   144	
   145	/**
   146	 * struct xsdfec_ldpc_params - User data for LDPC codes.
   147	 * @n: Number of code word bits
   148	 * @k: Number of information bits
   149	 * @psize: Size of sub-matrix
   150	 * @nlayers: Number of layers in code
   151	 * @nqc: Quasi Cyclic Number
   152	 * @nmqc: Number of M-sized QC operations in parity check matrix
   153	 * @nm: Number of M-size vectors in N
   154	 * @norm_type: Normalization required or not
   155	 * @no_packing: Determines if multiple QC ops should be performed
   156	 * @special_qc: Sub-Matrix property for Circulant weight > 0
   157	 * @no_final_parity: Decide if final parity check needs to be performed
   158	 * @max_schedule: Experimental code word scheduling limit
   159	 * @sc_off: SC offset
   160	 * @la_off: LA offset
   161	 * @qc_off: QC offset
   162	 * @sc_table: Pointer to SC Table which must be page aligned
   163	 * @la_table: Pointer to LA Table which must be page aligned
   164	 * @qc_table: Pointer to QC Table which must be page aligned
   165	 * @code_id: LDPC Code
   166	 *
   167	 * This structure describes the LDPC code that is passed to the driver by the
   168	 * application.
   169	 */
   170	struct xsdfec_ldpc_params {
   171		__u32 n;
   172		__u32 k;
   173		__u32 psize;
   174		__u32 nlayers;
   175		__u32 nqc;
   176		__u32 nmqc;
   177		__u32 nm;
   178		__u32 norm_type;
   179		__u32 no_packing;
   180		__u32 special_qc;
   181		__u32 no_final_parity;
   182		__u32 max_schedule;
   183		__u32 sc_off;
   184		__u32 la_off;
   185		__u32 qc_off;
   186		__u32 *sc_table;
   187		__u32 *la_table;
   188		__u32 *qc_table;
   189		__u16 code_id;
   190	};
   191	
   192	/**
   193	 * struct xsdfec_status - Status of SD-FEC core.
   194	 * @state: State of the SD-FEC core
   195	 * @activity: Describes if the SD-FEC instance is Active
   196	 */
   197	struct xsdfec_status {
   198		__u32 state;
   199		__s8 activity;
   200	};
   201	
   202	/**
   203	 * struct xsdfec_irq - Enabling or Disabling Interrupts.
   204	 * @enable_isr: If true enables the ISR
   205	 * @enable_ecc_isr: If true enables the ECC ISR
   206	 */
   207	struct xsdfec_irq {
   208		__s8 enable_isr;
   209		__s8 enable_ecc_isr;
   210	};
   211	
   212	/**
   213	 * struct xsdfec_config - Configuration of SD-FEC core.
   214	 * @code: The codes being used by the SD-FEC instance
   215	 * @order: Order of Operation
   216	 * @din_width: Width of the DIN AXI4-Stream
   217	 * @din_word_include: How DIN_WORDS are inputted
   218	 * @dout_width: Width of the DOUT AXI4-Stream
   219	 * @dout_word_include: HOW DOUT_WORDS are outputted
   220	 * @irq: Enabling or disabling interrupts
   221	 * @bypass: Is the core being bypassed
   222	 * @code_wr_protect: Is write protection of LDPC codes enabled
   223	 */
   224	struct xsdfec_config {
   225		__u32 code;
   226		__u32 order;
   227		__u32 din_width;
   228		__u32 din_word_include;
   229		__u32 dout_width;
   230		__u32 dout_word_include;
   231		struct xsdfec_irq irq;
   232		__s8 bypass;
   233		__s8 code_wr_protect;
   234	};
   235	
   236	/**
   237	 * struct xsdfec_stats - Stats retrived by ioctl XSDFEC_GET_STATS. Used
   238	 *			 to buffer atomic_t variables from struct
   239	 *			 xsdfec_dev. Counts are accumulated until
   240	 *			 the user clears them.
   241	 * @isr_err_count: Count of ISR errors
   242	 * @cecc_count: Count of Correctable ECC errors (SBE)
   243	 * @uecc_count: Count of Uncorrectable ECC errors (MBE)
   244	 */
   245	struct xsdfec_stats {
   246		__u32 isr_err_count;
   247		__u32 cecc_count;
   248		__u32 uecc_count;
   249	};
   250	
   251	/**
   252	 * struct xsdfec_ldpc_param_table_sizes - Used to store sizes of SD-FEC table
   253	 *					  entries for an individual LPDC code
   254	 *					  parameter.
   255	 * @sc_size: Size of SC table used
   256	 * @la_size: Size of LA table used
   257	 * @qc_size: Size of QC table used
   258	 */
   259	struct xsdfec_ldpc_param_table_sizes {
   260		__u32 sc_size;
   261		__u32 la_size;
   262		__u32 qc_size;
   263	};
   264	
   265	/*
   266	 * XSDFEC IOCTL List
   267	 */
   268	#define XSDFEC_MAGIC 'f'
   269	/**
   270	 * DOC: XSDFEC_START_DEV
   271	 *
   272	 * @Description
   273	 *
   274	 * ioctl to start SD-FEC core
   275	 *
   276	 * This fails if the XSDFEC_SET_ORDER ioctl has not been previously called
   277	 */
   278	#define XSDFEC_START_DEV _IO(XSDFEC_MAGIC, 0)
   279	/**
   280	 * DOC: XSDFEC_STOP_DEV
   281	 *
   282	 * @Description
   283	 *
   284	 * ioctl to stop the SD-FEC core
   285	 */
   286	#define XSDFEC_STOP_DEV _IO(XSDFEC_MAGIC, 1)
   287	/**
   288	 * DOC: XSDFEC_GET_STATUS
   289	 *
   290	 * @Description
   291	 *
   292	 * ioctl that returns status of SD-FEC core
   293	 */
   294	#define XSDFEC_GET_STATUS _IOR(XSDFEC_MAGIC, 2, struct xsdfec_status)
   295	/**
   296	 * DOC: XSDFEC_SET_IRQ
   297	 * @Parameters
   298	 *
   299	 * @struct xsdfec_irq *
   300	 *	Pointer to the &struct xsdfec_irq that contains the interrupt settings
   301	 *	for the SD-FEC core
   302	 *
   303	 * @Description
   304	 *
   305	 * ioctl to enable or disable irq
   306	 */
   307	#define XSDFEC_SET_IRQ _IOW(XSDFEC_MAGIC, 3, struct xsdfec_irq)
   308	/**
   309	 * DOC: XSDFEC_SET_TURBO
   310	 * @Parameters
   311	 *
   312	 * @struct xsdfec_turbo *
   313	 *	Pointer to the &struct xsdfec_turbo that contains the Turbo decode
   314	 *	settings for the SD-FEC core
   315	 *
   316	 * @Description
   317	 *
   318	 * ioctl that sets the SD-FEC Turbo parameter values
   319	 *
   320	 * This can only be used when the driver is in the XSDFEC_STOPPED state
   321	 */
   322	#define XSDFEC_SET_TURBO _IOW(XSDFEC_MAGIC, 4, struct xsdfec_turbo)
   323	/**
   324	 * DOC: XSDFEC_ADD_LDPC_CODE_PARAMS
   325	 * @Parameters
   326	 *
   327	 * @struct xsdfec_ldpc_params *
   328	 *	Pointer to the &struct xsdfec_ldpc_params that contains the LDPC code
   329	 *	parameters to be added to the SD-FEC Block
   330	 *
   331	 * @Description
   332	 * ioctl to add an LDPC code to the SD-FEC LDPC codes
   333	 *
   334	 * This can only be used when:
   335	 *
   336	 * - Driver is in the XSDFEC_STOPPED state
   337	 *
   338	 * - SD-FEC core is configured as LPDC
   339	 *
   340	 * - SD-FEC Code Write Protection is disabled
   341	 */
   342	#define XSDFEC_ADD_LDPC_CODE_PARAMS                                            \
   343		_IOW(XSDFEC_MAGIC, 5, struct xsdfec_ldpc_params)
   344	/**
   345	 * DOC: XSDFEC_GET_CONFIG
   346	 * @Parameters
   347	 *
   348	 * @struct xsdfec_config *
   349	 *	Pointer to the &struct xsdfec_config that contains the current
   350	 *	configuration settings of the SD-FEC Block
   351	 *
   352	 * @Description
   353	 *
   354	 * ioctl that returns SD-FEC core configuration
   355	 */
   356	#define XSDFEC_GET_CONFIG _IOR(XSDFEC_MAGIC, 6, struct xsdfec_config)
   357	/**
   358	 * DOC: XSDFEC_GET_TURBO
   359	 * @Parameters
   360	 *
   361	 * @struct xsdfec_turbo *
   362	 *	Pointer to the &struct xsdfec_turbo that contains the current Turbo
   363	 *	decode settings of the SD-FEC Block
   364	 *
   365	 * @Description
   366	 *
   367	 * ioctl that returns SD-FEC turbo param values
   368	 */
   369	#define XSDFEC_GET_TURBO _IOR(XSDFEC_MAGIC, 7, struct xsdfec_turbo)
   370	/**
   371	 * DOC: XSDFEC_SET_ORDER
   372	 * @Parameters
   373	 *
   374	 * @struct unsigned long *
   375	 *	Pointer to the unsigned long that contains a value from the
   376	 *	@enum xsdfec_order
   377	 *
   378	 * @Description
   379	 *
   380	 * ioctl that sets order, if order of blocks can change from input to output
   381	 *
   382	 * This can only be used when the driver is in the XSDFEC_STOPPED state
   383	 */
   384	#define XSDFEC_SET_ORDER _IOW(XSDFEC_MAGIC, 8, unsigned long)
   385	/**
   386	 * DOC: XSDFEC_SET_BYPASS
   387	 * @Parameters
   388	 *
   389	 * @struct bool *
   390	 *	Pointer to bool that sets the bypass value, where false results in
   391	 *	normal operation and false results in the SD-FEC performing the
   392	 *	configured operations (same number of cycles) but output data matches
   393	 *	the input data
   394	 *
   395	 * @Description
   396	 *
   397	 * ioctl that sets bypass.
   398	 *
   399	 * This can only be used when the driver is in the XSDFEC_STOPPED state
   400	 */
   401	#define XSDFEC_SET_BYPASS _IOW(XSDFEC_MAGIC, 9, bool)
   402	/**
   403	 * DOC: XSDFEC_IS_ACTIVE
   404	 * @Parameters
   405	 *
   406	 * @struct bool *
   407	 *	Pointer to bool that returns true if the SD-FEC is processing data
   408	 *
   409	 * @Description
   410	 *
   411	 * ioctl that determines if SD-FEC is processing data
   412	 */
   413	#define XSDFEC_IS_ACTIVE _IOR(XSDFEC_MAGIC, 10, bool)
   414	/**
   415	 * DOC: XSDFEC_CLEAR_STATS
   416	 *
   417	 * @Description
   418	 *
   419	 * ioctl that clears error stats collected during interrupts
   420	 */
   421	#define XSDFEC_CLEAR_STATS _IO(XSDFEC_MAGIC, 11)
   422	/**
   423	 * DOC: XSDFEC_GET_STATS
   424	 * @Parameters
   425	 *
   426	 * @struct xsdfec_stats *
   427	 *	Pointer to the &struct xsdfec_stats that will contain the updated stats
   428	 *	values
   429	 *
   430	 * @Description
   431	 *
   432	 * ioctl that returns SD-FEC core stats
   433	 *
   434	 * This can only be used when the driver is in the XSDFEC_STOPPED state
   435	 */
   436	#define XSDFEC_GET_STATS _IOR(XSDFEC_MAGIC, 12, struct xsdfec_stats)
   437	/**
   438	 * DOC: XSDFEC_SET_DEFAULT_CONFIG
   439	 *
   440	 * @Description
   441	 *
   442	 * ioctl that returns SD-FEC core to default config, use after a reset
   443	 *
   444	 * This can only be used when the driver is in the XSDFEC_STOPPED state
   445	 */
   446	#define XSDFEC_SET_DEFAULT_CONFIG _IO(XSDFEC_MAGIC, 13)
   447	
   448	#endif /* __XILINX_SDFEC_H__ */